1. Field of the Invention
The present invention relates to a flash memory device control mechanism, and more particularly, to a controlling method applied to a flash memory device and related controller thereof.
2. Description of the Prior Art
With the continuous development of flash memory technology in recent years, a variety of portable memory devices (e.g., memory cards complying with SD/MMC, CF, MS, XD standards) or solid state drives (SSDs) that include flash memory devices are widely applied in a variety of applications. Therefore, the access control of the flash memory devices within the memory devices is becoming a hot issue.
As to the common NAND flash memory devices, they are mainly categorized into two types of flash memory devices including single level cell (SLC) flash memory devices and multiple level cell (MLC) flash memory devices. Each transistor which is utilized as a memory cell within the SLC flash memory device has only two electric charge values for representing a logic value “0” and a logic value “1”, respectively. Besides, regarding the MLC flash memory device, the storage capacity of each transistor which is utilized as a memory cell is fully utilized by using a higher driving voltage to thereby record two groups (or above) of bit information (00, 01, 11, 10) in one transistor via different voltage levels; theoretically, a recording density of the MLC flash memory device is twice as large as a recording density of the SLC flash memory device. It is good news to NAND flash memory device industry that has suffered bottleneck ever.
Compared with the SLC flash memory device, the MLC flash memory device has a lower price and provides a larger storage capacity within a limited region. Therefore, using MLC flash memory devices in portable memory devices shipped to the market has become a main trend. However, problems are emerging due to instability of the MLC flash memory device. In order to ensure that the access control of the flash memory within the memory device satisfies the related specification, the controller of the flash memory device generally includes some management mechanisms to manage access of the information properly.
According to the related technology, the memory device employing the management mechanism still has its shortcomings. For example, a user may continuously write in some data that has a specific data pattern according to his custom, but writing the specific data pattern is especially prone to having access errors (e.g., write error, read error, etc.). Though a randomizer is disposed in the memory device for adjusting the data to solve the problem, the adjusted data is not essentially random due to the use of a conventional low-cost design. Besides, while the cost of the MLC flash memory device is continuously decreasing, the characteristic of the MLC flash memory device is also degraded continuously, i.e., access errors are more probably to happen. Therefore, an innovative method is needed to properly manage the accessed data within the MLC flash memory device to thereby prevent errors from happening. Regarding the important data such as operation system information, a proper data management is especially required to decrease the occurrence probability of errors.